summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx31.dtsi
blob: 95c05f17a6d5539b416af4fb1538dc53b15d1c43 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
// Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	/*
	 * The decompressor and also some bootloaders rely on a
	 * pre-existing /chosen node to be available to insert the
	 * command line and merge other ATAGS info.
	 */
	chosen {};

	aliases {
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &spi1;
		spi1 = &spi2;
		spi2 = &spi3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm1136jf-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	avic: interrupt-controller@68000000 {
		compatible = "fsl,imx31-avic", "fsl,avic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x68000000 0x100000>;
	};

	soc: soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&avic>;
		ranges;

		iram: sram@1fffc000 {
			compatible = "mmio-sram";
			reg = <0x1fffc000 0x4000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x1fffc000 0x4000>;
		};

		aips1: bus@43f00000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x43f00000 0x100000>;
			ranges;

			i2c1: i2c@43f80000 {
				compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
				reg = <0x43f80000 0x4000>;
				interrupts = <10>;
				clocks = <&clks 33>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c3: i2c@43f84000 {
				compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
				reg = <0x43f84000 0x4000>;
				interrupts = <3>;
				clocks = <&clks 35>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			ata: ata@43f8c000 {
				compatible = "fsl,imx31-pata", "fsl,imx27-pata";
				reg = <0x43f8c000 0x4000>;
				interrupts = <15>;
				clocks = <&clks 26>;
				status = "disabled";
			};

			uart1: serial@43f90000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43f90000 0x4000>;
				interrupts = <45>;
				clocks = <&clks 10>, <&clks 30>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart2: serial@43f94000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43f94000 0x4000>;
				interrupts = <32>;
				clocks = <&clks 10>, <&clks 31>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@43f98000 {
				compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
				reg = <0x43f98000 0x4000>;
				interrupts = <4>;
				clocks = <&clks 34>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			spi1: spi@43fa4000 {
				compatible = "fsl,imx31-cspi";
				reg = <0x43fa4000 0x4000>;
				interrupts = <14>;
				clocks = <&clks 10>, <&clks 53>;
				clock-names = "ipg", "per";
				dmas = <&sdma 8 8 0>, <&sdma 9 8 0>;
				dma-names = "rx", "tx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			kpp: kpp@43fa8000 {
				compatible = "fsl,imx31-kpp", "fsl,imx21-kpp";
				reg = <0x43fa8000 0x4000>;
				interrupts = <24>;
				clocks = <&clks 46>;
				status = "disabled";
			};

			uart4: serial@43fb0000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43fb0000 0x4000>;
				clocks = <&clks 10>, <&clks 49>;
				clock-names = "ipg", "per";
				interrupts = <46>;
				status = "disabled";
			};

			uart5: serial@43fb4000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x43fb4000 0x4000>;
				interrupts = <47>;
				clocks = <&clks 10>, <&clks 50>;
				clock-names = "ipg", "per";
				status = "disabled";
			};
		};

		spba-bus@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x100000>;
			ranges;

			sdhci1: mmc@50004000 {
				compatible = "fsl,imx31-mmc";
				reg = <0x50004000 0x4000>;
				interrupts = <9>;
				clocks = <&clks 10>, <&clks 20>;
				clock-names = "ipg", "per";
				dmas = <&sdma 20 3 0>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			sdhci2: mmc@50008000 {
				compatible = "fsl,imx31-mmc";
				reg = <0x50008000 0x4000>;
				interrupts = <8>;
				clocks = <&clks 10>, <&clks 21>;
				clock-names = "ipg", "per";
				dmas = <&sdma 21 3 0>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			uart3: serial@5000c000 {
				compatible = "fsl,imx31-uart", "fsl,imx21-uart";
				reg = <0x5000c000 0x4000>;
				interrupts = <18>;
				clocks = <&clks 10>, <&clks 48>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			spi2: spi@50010000 {
				compatible = "fsl,imx31-cspi";
				reg = <0x50010000 0x4000>;
				interrupts = <13>;
				clocks = <&clks 10>, <&clks 54>;
				clock-names = "ipg", "per";
				dmas = <&sdma 6 8 0>, <&sdma 7 8 0>;
				dma-names = "rx", "tx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			iim: efuse@5001c000 {
				compatible = "fsl,imx31-iim", "fsl,imx27-iim";
				reg = <0x5001c000 0x1000>;
				interrupts = <19>;
				clocks = <&clks 25>;
			};
		};

		bus@53f00000 { /* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x53f00000 0x100000>;
			ranges;

			clks: ccm@53f80000{
				compatible = "fsl,imx31-ccm";
				reg = <0x53f80000 0x4000>;
				interrupts = <31>, <53>;
				#clock-cells = <1>;
			};

			spi3: spi@53f84000 {
				compatible = "fsl,imx31-cspi";
				reg = <0x53f84000 0x4000>;
				interrupts = <17>;
				clocks = <&clks 10>, <&clks 28>;
				clock-names = "ipg", "per";
				dmas = <&sdma 10 8 0>, <&sdma 11 8 0>;
				dma-names = "rx", "tx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			gpt: timer@53f90000 {
				compatible = "fsl,imx31-gpt";
				reg = <0x53f90000 0x4000>;
				interrupts = <29>;
				clocks = <&clks 10>, <&clks 22>;
				clock-names = "ipg", "per";
			};

			gpio3: gpio@53fa4000 {
				compatible = "fsl,imx31-gpio";
				reg = <0x53fa4000 0x4000>;
				interrupts = <56>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			rng@53fb0000 {
				compatible = "fsl,imx31-rnga";
				reg = <0x53fb0000 0x4000>;
				interrupts = <22>;
				clocks = <&clks 29>;
			};

			gpio1: gpio@53fcc000 {
				compatible = "fsl,imx31-gpio";
				reg = <0x53fcc000 0x4000>;
				interrupts = <52>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@53fd0000 {
				compatible = "fsl,imx31-gpio";
				reg = <0x53fd0000 0x4000>;
				interrupts = <51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			sdma: dma-controller@53fd4000 {
				compatible = "fsl,imx31-sdma";
				reg = <0x53fd4000 0x4000>;
				interrupts = <34>;
				clocks = <&clks 10>, <&clks 27>;
				clock-names = "ipg", "ahb";
				#dma-cells = <3>;
				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx31.bin";
			};

			rtc: rtc@53fd8000 {
				compatible = "fsl,imx31-rtc", "fsl,imx21-rtc";
				reg = <0x53fd8000 0x4000>;
				interrupts = <25>;
				clocks = <&clks 2>, <&clks 40>;
				clock-names = "ref", "ipg";
			};

			wdog: watchdog@53fdc000 {
				compatible = "fsl,imx31-wdt", "fsl,imx21-wdt";
				reg = <0x53fdc000 0x4000>;
				clocks = <&clks 41>;
				interrupts = <55>;
			};

			pwm: pwm@53fe0000 {
				compatible = "fsl,imx31-pwm", "fsl,imx27-pwm";
				reg = <0x53fe0000 0x4000>;
				interrupts = <26>;
				clocks = <&clks 10>, <&clks 42>;
				clock-names = "ipg", "per";
				#pwm-cells = <3>;
				status = "disabled";
			};
		};

		emi@b8000000 { /* External Memory Interface */
			compatible = "simple-bus";
			reg = <0xb8000000 0x5000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;

			nfc: nand@b8000000 {
				compatible = "fsl,imx31-nand", "fsl,imx27-nand";
				reg = <0xb8000000 0x1000>;
				interrupts = <33>;
				clocks = <&clks 9>;
				dmas = <&sdma 30 17 0>;
				dma-names = "rx-tx";
				#address-cells = <1>;
				#size-cells = <1>;
				status = "disabled";
			};

			weim: weim@b8002000 {
				compatible = "fsl,imx31-weim", "fsl,imx27-weim";
				reg = <0xb8002000 0x1000>;
				clocks = <&clks 56>;
				#address-cells = <2>;
				#size-cells = <1>;
				ranges = <0 0 0xa0000000 0x08000000
					  1 0 0xa8000000 0x08000000
					  2 0 0xb0000000 0x02000000
					  3 0 0xb2000000 0x02000000
					  4 0 0xb4000000 0x02000000
					  5 0 0xb6000000 0x02000000>;
				status = "disabled";
			};
		};
	};
};