blob: a580b04987ec02cbc61c952f7db64026f7b25f70 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
|
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
*
* Copyright (C) 2022 Renesas Electronics Corp.
*/
/*
* DIP-Switch SW1 setting
* 1 : High; 0: Low
* SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
* SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
* Please change below macros according to SW1 setting
*/
#define SW_SW0_DEV_SEL 1
#define SW_ET0_EN_N 1
#include "rzg2ul-smarc-som.dtsi"
#include "rzg2ul-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"
&i2c1 {
wm8978: codec@1a {
compatible = "wlf,wm8978";
#sound-dai-cells = <0>;
reg = <0x1a>;
};
};
&vccq_sdhi1 {
gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>;
};
|
