1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
|
[
{
"EventName": "l3_lookup_state.l3_miss",
"EventCode": "0x04",
"BriefDescription": "L3 cache misses.",
"UMask": "0x01",
"Unit": "L3PMC"
},
{
"EventName": "l3_lookup_state.l3_hit",
"EventCode": "0x04",
"BriefDescription": "L3 cache hits.",
"UMask": "0xfe",
"Unit": "L3PMC"
},
{
"EventName": "l3_lookup_state.all_coherent_accesses_to_l3",
"EventCode": "0x04",
"BriefDescription": "L3 cache requests for all coherent accesses.",
"UMask": "0xff",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency.dram_near",
"EventCode": "0xac",
"BriefDescription": "Average sampled latency when data is sourced from DRAM in the same NUMA node.",
"UMask": "0x01",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency.dram_far",
"EventCode": "0xac",
"BriefDescription": "Average sampled latency when data is sourced from DRAM in a different NUMA node.",
"UMask": "0x02",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency.near_cache",
"EventCode": "0xac",
"BriefDescription": "Average sampled latency when data is sourced from another CCX's cache when the address was in the same NUMA node.",
"UMask": "0x04",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency.far_cache",
"EventCode": "0xac",
"BriefDescription": "Average sampled latency when data is sourced from another CCX's cache when the address was in a different NUMA node.",
"UMask": "0x08",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency.ext_near",
"EventCode": "0xac",
"BriefDescription": "Average sampled latency when data is sourced from extension memory (CXL) in the same NUMA node.",
"UMask": "0x10",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency.ext_far",
"EventCode": "0xac",
"BriefDescription": "Average sampled latency when data is sourced from extension memory (CXL) in a different NUMA node.",
"UMask": "0x20",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency.all",
"EventCode": "0xac",
"BriefDescription": "Average sampled latency from all data sources.",
"UMask": "0x3f",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency_requests.dram_near",
"EventCode": "0xad",
"BriefDescription": "L3 cache fill requests sourced from DRAM in the same NUMA node.",
"UMask": "0x01",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency_requests.dram_far",
"EventCode": "0xad",
"BriefDescription": "L3 cache fill requests sourced from DRAM in a different NUMA node.",
"UMask": "0x02",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency_requests.near_cache",
"EventCode": "0xad",
"BriefDescription": "L3 cache fill requests sourced from another CCX's cache when the address was in the same NUMA node.",
"UMask": "0x04",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency_requests.far_cache",
"EventCode": "0xad",
"BriefDescription": "L3 cache fill requests sourced from another CCX's cache when the address was in a different NUMA node.",
"UMask": "0x08",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency_requests.ext_near",
"EventCode": "0xad",
"BriefDescription": "L3 cache fill requests sourced from extension memory (CXL) in the same NUMA node.",
"UMask": "0x10",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency_requests.ext_far",
"EventCode": "0xad",
"BriefDescription": "L3 cache fill requests sourced from extension memory (CXL) in a different NUMA node.",
"UMask": "0x20",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
},
{
"EventName": "l3_xi_sampled_latency_requests.all",
"EventCode": "0xad",
"BriefDescription": "L3 cache fill requests sourced from all data sources.",
"UMask": "0x3f",
"EnAllCores": "0x1",
"EnAllSlices": "0x1",
"SliceId": "0x3",
"ThreadMask": "0x3",
"Unit": "L3PMC"
}
]
|
