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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-02-14 15:35:04 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2023-03-30 19:42:05 +0300 |
| commit | 780668dfefa009a977af386c00f26b686e5a8688 (patch) | |
| tree | bda9976b002d3f61db58bd524a9c6e6cdec0be2c | |
| parent | f62ad0f6f4dd03b6fa45b5afb46084511c7d9920 (diff) | |
| download | linux-780668dfefa009a977af386c00f26b686e5a8688.tar.xz | |
drm/msm/a5xx: add devcoredump support to the fault handler
Use adreno_fault_handler() to implement a5xx_fault_handler(). This
enables devcoredump support on a5xx platforms, allowing one to capture
the crashed GPU state at the time of context fault.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/522724/
Link: https://lore.kernel.org/r/20230214123504.3729522-4-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 1da3e47fbeef..1e8d2982d603 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1096,16 +1096,19 @@ bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) static int a5xx_fault_handler(void *arg, unsigned long iova, int flags, void *data) { struct msm_gpu *gpu = arg; - pr_warn_ratelimited("*** gpu fault: iova=%08lx, flags=%d (%u,%u,%u,%u)\n", - iova, flags, + struct adreno_smmu_fault_info *info = data; + char block[12] = "unknown"; + u32 scratch[] = { gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(4)), gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(5)), gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(6)), - gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(7))); + gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(7)), + }; - gpu->aspace->mmu->funcs->resume_translation(gpu->aspace->mmu); + if (info) + snprintf(block, sizeof(block), "%x", info->fsynr1); - return 0; + return adreno_fault_handler(gpu, iova, flags, info, block, scratch); } static void a5xx_cp_err_irq(struct msm_gpu *gpu) |