diff options
| author | Biao Huang <biao.huang@mediatek.com> | 2022-03-14 10:57:13 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-03-16 15:49:23 +0300 |
| commit | ee410d510032d3b059bc4b135cd56620b1db689a (patch) | |
| tree | 4804916a9bd10e4795a723b59e2bb6a6204893c4 | |
| parent | f2d356a6ab71a402ee730b4bf83b452a203fe192 (diff) | |
| download | linux-ee410d510032d3b059bc4b135cd56620b1db689a.tar.xz | |
net: dt-bindings: dwmac: add support for mt8195
Add binding document for the ethernet on mt8195.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | Documentation/devicetree/bindings/net/mediatek-dwmac.yaml | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml index 8ad6e19661b8..901944683322 100644 --- a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml @@ -19,6 +19,7 @@ select: contains: enum: - mediatek,mt2712-gmac + - mediatek,mt8195-gmac required: - compatible @@ -27,26 +28,35 @@ allOf: properties: compatible: - items: - - enum: - - mediatek,mt2712-gmac - - const: snps,dwmac-4.20a + oneOf: + - items: + - enum: + - mediatek,mt2712-gmac + - const: snps,dwmac-4.20a + - items: + - enum: + - mediatek,mt8195-gmac + - const: snps,dwmac-5.10a clocks: + minItems: 5 items: - description: AXI clock - description: APB clock - description: MAC Main clock - description: PTP clock - description: RMII reference clock provided by MAC + - description: MAC clock gate clock-names: + minItems: 5 items: - const: axi - const: apb - const: mac_main - const: ptp_ref - const: rmii_internal + - const: mac_cg mediatek,pericfg: $ref: /schemas/types.yaml#/definitions/phandle @@ -61,6 +71,8 @@ properties: or will round down. Range 0~31*170. For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550, or will round down. Range 0~31*550. + For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290, + or will round down. Range 0~31*290. mediatek,rx-delay-ps: description: @@ -69,6 +81,8 @@ properties: or will round down. Range 0~31*170. For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550, or will round down. Range 0~31*550. + For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple + of 290, or will round down. Range 0~31*290. mediatek,rmii-rxc: type: boolean @@ -102,6 +116,12 @@ properties: 3. the inside clock, which be sent to MAC, will be inversed in RMII case when the reference clock is from MAC. + mediatek,mac-wol: + type: boolean + description: + If present, indicates that MAC supports WOL(Wake-On-LAN), and MAC WOL will be enabled. + Otherwise, PHY WOL is perferred. + required: - compatible - reg |