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| author | Dan Williams <dan.j.williams@intel.com> | 2022-02-01 00:56:11 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-02-09 09:57:32 +0300 |
| commit | bcc79ea34398845d814170ddc06a457b35ae1975 (patch) | |
| tree | 2fcb3dd6d2c6e2105779b6d76e28eb77554d062f /Documentation/ABI/testing/sysfs-bus-cxl | |
| parent | 523e594d9cc03db962c741ce02c8a58aab58a123 (diff) | |
| download | linux-bcc79ea34398845d814170ddc06a457b35ae1975.tar.xz | |
cxl/pci: Emit device serial number
Per the CXL specification (8.1.12.2 Memory Device PCIe Capabilities and
Extended Capabilities) the Device Serial Number capability is mandatory.
Emit it for user tooling to identify devices.
It is reasonable to ask whether the attribute should be added to the
list of PCI sysfs device attributes. The PCI layer can optionally emit
it too, but the CXL subsystem is aiming to preserve its independence and
the possibility of CXL topologies with non-PCI devices in it. To date
that has only proven useful for the 'cxl_test' model, but as can be seen
with seen with ACPI0016 devices, sometimes all that is needed is a
platform firmware table to point to CXL Component Registers in MMIO
space to define a "CXL" device.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164366608838.196598.16856227191534267098.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'Documentation/ABI/testing/sysfs-bus-cxl')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-bus-cxl | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/testing/sysfs-bus-cxl index 6d8cbf3355b5..87c0e5e65322 100644 --- a/Documentation/ABI/testing/sysfs-bus-cxl +++ b/Documentation/ABI/testing/sysfs-bus-cxl @@ -25,6 +25,15 @@ Description: identically named field in the Identify Memory Device Output Payload in the CXL-2.0 specification. +What: /sys/bus/cxl/devices/memX/serial +Date: January, 2022 +KernelVersion: v5.18 +Contact: linux-cxl@vger.kernel.org +Description: + (RO) 64-bit serial number per the PCIe Device Serial Number + capability. Mandatory for CXL devices, see CXL 2.0 8.1.12.2 + Memory Device PCIe Capabilities and Extended Capabilities. + What: /sys/bus/cxl/devices/*/devtype Date: June, 2021 KernelVersion: v5.14 |