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authorZhou Wang <wangzhou1@hisilicon.com>2015-10-30 04:02:51 +0300
committerBjorn Helgaas <bhelgaas@google.com>2015-11-03 00:39:24 +0300
commit500a1d9a43e0a16e3cfc48f4b192ad421d4de376 (patch)
tree100edbb469c913d59c11284b6b717b965ad4e7d7 /Documentation/devicetree/bindings/arm/hisilicon
parentdf7701621b8ba6a5b387b451e409276ed9c034e5 (diff)
downloadlinux-500a1d9a43e0a16e3cfc48f4b192ad421d4de376.tar.xz
PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver
Add PCIe host support for HiSilicon SoC Hip05, related DT binding documentation, and maintainer update. [bhelgaas: changelog, 32-bit only config write warning text] Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: liudongdong <liudongdong3@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> (DT binding)
Diffstat (limited to 'Documentation/devicetree/bindings/arm/hisilicon')
-rw-r--r--Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt17
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index c733e28e18e5..764c738bb3ba 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -167,6 +167,23 @@ Example:
};
-----------------------------------------------------------------------
+Hisilicon HiP05 PCIe-SAS system controller
+
+Required properties:
+- compatible : "hisilicon,pcie-sas-subctrl", "syscon";
+- reg : Register address and size
+
+The HiP05 PCIe-SAS system controller is shared by PCIe and SAS controllers in
+HiP05 Soc to implement some basic configurations.
+
+Example:
+ /* for HiP05 PCIe-SAS system */
+ pcie_sas: system_controller@0xb0000000 {
+ compatible = "hisilicon,pcie-sas-subctrl", "syscon";
+ reg = <0xb0000000 0x10000>;
+ };
+
+-----------------------------------------------------------------------
Hisilicon CPU controller
Required properties: