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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-01-23 15:45:50 +0300
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-01-23 15:45:50 +0300
commit64e57b7db429dd28de5ba93290870c61c8b52a5c (patch)
treeb17e591ad321a8e1dc4f9f72b8efc2d7fda226a9 /Documentation/devicetree/bindings/clock
parent163cd42fc49081964e0fc6f0b1e94b6b50eb85f5 (diff)
parentbc8cc7fb55b8da8c6b947603b1bad585e866b90c (diff)
downloadlinux-64e57b7db429dd28de5ba93290870c61c8b52a5c.tar.xz
Merge tag 'samsung-dt-bindings-clk-6.9-2' into next/clk
dt-bindings for Google GS101 clock controllers for v6.9 The Devicetree binding headers for Samsung Exynos and Google GS101 clock controllers, used by the Samsung clock controller drivers.
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/google,gs101-clock.yaml25
1 files changed, 23 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
index ca7fdada3ff2..03698cdecf7a 100644
--- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
@@ -30,14 +30,15 @@ properties:
- google,gs101-cmu-top
- google,gs101-cmu-apm
- google,gs101-cmu-misc
+ - google,gs101-cmu-peric0
clocks:
minItems: 1
- maxItems: 2
+ maxItems: 3
clock-names:
minItems: 1
- maxItems: 2
+ maxItems: 3
"#clock-cells":
const: 1
@@ -88,6 +89,26 @@ allOf:
- const: bus
- const: sss
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: google,gs101-cmu-peric0
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (24.576 MHz)
+ - description: Connectivity Peripheral 0 bus clock (from CMU_TOP)
+ - description: Connectivity Peripheral 0 IP clock (from CMU_TOP)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: bus
+ - const: ip
+
additionalProperties: false
examples: