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author | James Hartley <james.hartley@imgtec.com> | 2015-03-13 02:17:27 +0300 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2015-03-16 13:46:25 +0300 |
commit | 5986ac4fcb451160acdc8bf3a0b81ac9a72b3251 (patch) | |
tree | c448fd5496a7fe4780be6afbf920ad074aaba940 /Documentation/devicetree/bindings/crypto/img-hash.txt | |
parent | d358f1abbf71ad4b10e843b589033e5d37142436 (diff) | |
download | linux-5986ac4fcb451160acdc8bf3a0b81ac9a72b3251.tar.xz |
Documentation: crypto: Add DT binding info for the img hw hash accelerator
This adds the binding documentation for the Imagination Technologies hash
accelerator that provides hardware acceleration for SHA1/SHA224/SHA256/MD5
hashes. This hardware will be present in the upcoming pistachio SoC.
Signed-off-by: James Hartley <james.hartley@imgtec.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'Documentation/devicetree/bindings/crypto/img-hash.txt')
-rw-r--r-- | Documentation/devicetree/bindings/crypto/img-hash.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/img-hash.txt b/Documentation/devicetree/bindings/crypto/img-hash.txt new file mode 100644 index 000000000000..91a3d757d641 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/img-hash.txt @@ -0,0 +1,27 @@ +Imagination Technologies hardware hash accelerator + +The hash accelerator provides hardware hashing acceleration for +SHA1, SHA224, SHA256 and MD5 hashes + +Required properties: + +- compatible : "img,hash-accelerator" +- reg : Offset and length of the register set for the module, and the DMA port +- interrupts : The designated IRQ line for the hashing module. +- dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt +- dma-names : Should be "tx" +- clocks : Clock specifiers +- clock-names : "sys" Used to clock the hash block registers + "hash" Used to clock data through the accelerator + +Example: + + hash: hash@18149600 { + compatible = "img,hash-accelerator"; + reg = <0x18149600 0x100>, <0x18101100 0x4>; + interrupts = <GIC_SHARED 59 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma 8 0xffffffff 0>; + dma-names = "tx"; + clocks = <&cr_periph SYS_CLK_HASH>, <&clk_periph PERIPH_CLK_ROM>; + clock-names = "sys", "hash"; + }; |