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author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-12-30 16:56:43 +0300 |
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committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-01-13 13:47:52 +0300 |
commit | 12a18bb74f7500693bdfb6af2f99c05d2d43f9c6 (patch) | |
tree | 9e612be24710c14820547df5cc4bfc71272f83ae /Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | |
parent | 45277153d46500ce7f4a1637412f0db7c208300a (diff) | |
download | linux-12a18bb74f7500693bdfb6af2f99c05d2d43f9c6.tar.xz |
dt-bindings: pinctrl: qcom: allow nine interrupts on SM6350
Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
summary interrupt. SM6350 is different because downstream and upstream
DTS have nine of the interrupts. Allow such variation.
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221230135645.56401-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml index a76117e41d93..add3c7e64520 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml @@ -20,7 +20,9 @@ properties: description: Specifies the base address and size of the TLMM register space maxItems: 1 - interrupts: true + interrupts: + maxItems: 1 + interrupt-controller: true "#interrupt-cells": true gpio-controller: true |