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authorIngo Molnar <mingo@kernel.org>2017-03-23 09:35:15 +0300
committerIngo Molnar <mingo@kernel.org>2017-03-23 09:35:15 +0300
commit4ccb6aea4b3eb97c94575d1ed4bf10744169f082 (patch)
treea2ca8bc8b567608bd4067593b752f78c895d713b /Documentation/devicetree/bindings/pwm/imx-pwm.txt
parentf25d384755191690b1196776d319cb6a4e899f28 (diff)
parent093b995e3b55a0ae0670226ddfcb05bfbf0099ae (diff)
downloadlinux-4ccb6aea4b3eb97c94575d1ed4bf10744169f082.tar.xz
Merge branch 'linus' into x86/asm, to refresh the topic tree with fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm/imx-pwm.txt')
-rw-r--r--Documentation/devicetree/bindings/pwm/imx-pwm.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
index e00c2e9f484d..c61bdf8cd41b 100644
--- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
@@ -6,8 +6,8 @@ Required properties:
- "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1
- "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27
- reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- the cells format.
+- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.txt
+ in this directory for a description of the cells format.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"
See the clock consumer binding,
@@ -17,7 +17,7 @@ See the clock consumer binding,
Example:
pwm1: pwm@53fb4000 {
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
reg = <0x53fb4000 0x4000>;
clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,