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| author | Michal Simek <michal.simek@amd.com> | 2023-08-03 10:24:24 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-08-03 19:07:10 +0300 |
| commit | 88362275240303455bbec05c249daa84aff07059 (patch) | |
| tree | d648e140d9b3e62fce2b4b0fb4a0e7d22e49b89f /Documentation/devicetree/bindings/spi | |
| parent | de5e92cb5cefd2968b96075995a36e28298edf71 (diff) | |
| download | linux-88362275240303455bbec05c249daa84aff07059.tar.xz | |
dt-bindings: spi: spi-cadence: Describe power-domains property
ZynqMP Cadence SPI IP core has own power domain that's why describe it as
optional property.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/987430ee905fd299fe962663d94f848b341c87df.1691047461.git.michal.simek@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
| -rw-r--r-- | Documentation/devicetree/bindings/spi/spi-cadence.yaml | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml index b7552739b554..9eda7f0d2869 100644 --- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml +++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml @@ -49,6 +49,9 @@ properties: enum: [ 0, 1 ] default: 0 + power-domains: + maxItems: 1 + required: - compatible - reg |