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| author | Vineet Gupta <vgupta@kernel.org> | 2023-02-16 08:06:33 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@kernel.org> | 2023-12-09 03:30:24 +0300 |
| commit | 6732c0e494ac35fbadd749bbbd226c0aceb2d2c4 (patch) | |
| tree | de0ec244bb228891a3cc139a3fb8abd97b96a3b1 /arch/arc/Kconfig | |
| parent | 3a02ec2f0b304af6b38e9cc5a009bf517d38e72c (diff) | |
| download | linux-6732c0e494ac35fbadd749bbbd226c0aceb2d2c4.tar.xz | |
ARC: mm: retire support for aliasing VIPT D$
Legacy ARC700 processors (first generation of MMU enabled ARC cores) had
VIPT cached which could be configured such that they could alias.
Corresponding support in kernel (with all the obnoxious cache flush overhead)
was added in ARC port 10 years ago to support 1 silicon. That is long bygone
and we can let it RIP.
Cc: Matthew Wilcox (Oracle) <willy@infradead.org>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
Diffstat (limited to 'arch/arc/Kconfig')
| -rw-r--r-- | arch/arc/Kconfig | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 3162db540ee9..1b0483c51cc1 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -49,7 +49,6 @@ config ARC select OF select OF_EARLY_FLATTREE select PCI_SYSCALL if PCI - select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 && !CPU_ENDIAN_BE32 select TRACE_IRQFLAGS_SUPPORT @@ -232,10 +231,6 @@ config ARC_CACHE_PAGES Note that Global I/D ENABLE + Per Page DISABLE works but corollary Global DISABLE + Per Page ENABLE won't work -config ARC_CACHE_VIPT_ALIASING - bool "Support VIPT Aliasing D$" - depends on ARC_HAS_DCACHE && ISA_ARCOMPACT - endif #ARC_CACHE config ARC_HAS_ICCM |