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authorLucas Stach <l.stach@pengutronix.de>2016-11-08 19:55:36 +0300
committerShawn Guo <shawnguo@kernel.org>2016-11-14 10:30:49 +0300
commitdf38e42f9da9ad731c287963f012bee46cf01169 (patch)
tree95fbbedc12a55ba4dac015fb96f0fbb77336b459 /arch/arm/boot/dts/imx6qp.dtsi
parent6fe5aeb5e7e9318bb720b1f582fc86b7ac3118c0 (diff)
downloadlinux-df38e42f9da9ad731c287963f012bee46cf01169.tar.xz
ARM: dts: imx6qp: correct LDB clock inputs
On i.MX6QP the LDB clock tree has changed to move the clk gate before the divider, to prevent clock glitches propagating downstream. A consequence of this change is that the clk divider is now the parent of the LDB inputs. Reflect this change in the devicetree to allow the LDB driver to properly configure the display clocks. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qp.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qp.dtsi10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 886dbf2eca49..caaa04036c8a 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -87,3 +87,13 @@
};
};
};
+
+&ldb {
+ clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
+ <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
+ <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
+ <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>;
+ clock-names = "di0_pll", "di1_pll",
+ "di0_sel", "di1_sel", "di2_sel", "di3_sel",
+ "di0", "di1";
+};