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| author | Tim Lunn <tim@feathertop.org> | 2023-12-03 15:40:00 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2023-12-05 11:20:44 +0300 |
| commit | b1ed25667f5f88531bcb51f3683029693e7a9b8c (patch) | |
| tree | a00f7ebc71aa26552253274dc213830b80027e72 /arch/arm/boot/dts/rockchip | |
| parent | 9f35b08ab08b913abf65cc4ff8d2655ad7912d77 (diff) | |
| download | linux-b1ed25667f5f88531bcb51f3683029693e7a9b8c.tar.xz | |
ARM: dts: rockchip: Add i2c2 node to rv1126
Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
Signed-off-by: Tim Lunn <tim@feathertop.org>
Link: https://lore.kernel.org/r/20231203124004.2676174-5-tim@feathertop.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rockchip')
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rv1126.dtsi | 15 |
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi index 4f85b7b3fc4c..167a48afa3a4 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi @@ -87,6 +87,16 @@ <0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>; }; }; + i2c2 { + /omit-if-no-ref/ + i2c2_xfer: i2c2-xfer { + rockchip,pins = + /* i2c2_scl */ + <0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>, + /* i2c2_sda */ + <0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>; + }; + }; pwm2 { /omit-if-no-ref/ pwm2m0_pins: pwm2m0-pins { diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi index adb11a43c5db..bb603cae13df 100644 --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi @@ -21,6 +21,7 @@ aliases { i2c0 = &i2c0; + i2c2 = &i2c2; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -237,6 +238,20 @@ status = "disabled"; }; + i2c2: i2c@ff400000 { + compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c"; + reg = <0xff400000 0x1000>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + rockchip,grf = <&pmugrf>; + clocks = <&pmucru CLK_I2C2>, <&pmucru PCLK_I2C2>; + clock-names = "i2c", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_xfer>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + uart1: serial@ff410000 { compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart"; reg = <0xff410000 0x100>; |