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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-08 22:14:29 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-08 22:14:29 +0400
commitb3345d7c57d70e6cb6749af25cdbe80515582e99 (patch)
tree04cce706bc7e944ad1fb257108a8ae735948f97f /arch/arm/mach-exynos/platsmp.c
parent44c916d58b9ef1f2c4aec2def57fa8289c716a60 (diff)
parentc2fff85e21818952aa0ee5778926beee6c03e579 (diff)
downloadlinux-b3345d7c57d70e6cb6749af25cdbe80515582e99.tar.xz
Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson: "This is the bulk of new SoC enablement and other platform changes for 3.17: - Samsung S5PV210 has been converted to DT and multiplatform - Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms - Kirkwood, one of the popular Marvell platforms, is folded into the mvebu platform code, removing mach-kirkwood - Hwmod data for TI AM43xx and DRA7 platforms - More additions of Renesas shmobile platform support - Removal of plat-samsung contents that can be removed with S5PV210 being multiplatform/DT-enabled and the other two old platforms being removed New platforms (most with only basic support right now): - Hisilicon X5HD2 settop box chipset is introduced - Mediatek MT6589 (mobile chipset) is introduced - Broadcom BCM7xxx settop box chipset is introduced + as usual a lot other pieces all over the platform code" * tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits) ARM: hisi: remove smp from machine descriptor power: reset: move hisilicon reboot code ARM: dts: Add hix5hd2-dkb dts file. ARM: debug: Rename Hi3716 to HIX5HD2 ARM: hisi: enable hix5hd2 SoC ARM: hisi: add ARCH_HISI MAINTAINERS: add entry for Broadcom ARM STB architecture ARM: brcmstb: select GISB arbiter and interrupt drivers ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: configs: enable SMP in bcm_defconfig ARM: add SMP support for Broadcom mobile SoCs Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ...
Diffstat (limited to 'arch/arm/mach-exynos/platsmp.c')
-rw-r--r--arch/arm/mach-exynos/platsmp.c22
1 files changed, 12 insertions, 10 deletions
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index e5a8d764f24c..a9f1cf759949 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -26,6 +26,8 @@
#include <asm/smp_scu.h>
#include <asm/firmware.h>
+#include <mach/map.h>
+
#include "common.h"
#include "regs-pmu.h"
@@ -41,7 +43,7 @@ extern void exynos4_secondary_startup(void);
*/
void exynos_cpu_power_down(int cpu)
{
- __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+ pmu_raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
}
/**
@@ -52,8 +54,8 @@ void exynos_cpu_power_down(int cpu)
*/
void exynos_cpu_power_up(int cpu)
{
- __raw_writel(S5P_CORE_LOCAL_PWR_EN,
- EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+ pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN,
+ EXYNOS_ARM_CORE_CONFIGURATION(cpu));
}
/**
@@ -63,7 +65,7 @@ void exynos_cpu_power_up(int cpu)
*/
int exynos_cpu_power_state(int cpu)
{
- return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) &
+ return (pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) &
S5P_CORE_LOCAL_PWR_EN);
}
@@ -73,7 +75,7 @@ int exynos_cpu_power_state(int cpu)
*/
void exynos_cluster_power_down(int cluster)
{
- __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster));
+ pmu_raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster));
}
/**
@@ -82,8 +84,8 @@ void exynos_cluster_power_down(int cluster)
*/
void exynos_cluster_power_up(int cluster)
{
- __raw_writel(S5P_CORE_LOCAL_PWR_EN,
- EXYNOS_COMMON_CONFIGURATION(cluster));
+ pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN,
+ EXYNOS_COMMON_CONFIGURATION(cluster));
}
/**
@@ -93,14 +95,14 @@ void exynos_cluster_power_up(int cluster)
*/
int exynos_cluster_power_state(int cluster)
{
- return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) &
- S5P_CORE_LOCAL_PWR_EN);
+ return (pmu_raw_readl(EXYNOS_COMMON_STATUS(cluster)) &
+ S5P_CORE_LOCAL_PWR_EN);
}
static inline void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
- return S5P_INFORM5;
+ return pmu_base_addr + S5P_INFORM5;
return sysram_base_addr;
}