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authorKrzysztof Hałasa <khc@pm.waw.pl>2009-11-15 03:25:06 +0300
committerKrzysztof Hałasa <khc@pm.waw.pl>2009-12-05 18:58:39 +0300
commitcba362221b12b102dff1f21b291fdc7b93e24a18 (patch)
tree4cd021ffb805b601292ab785b84c92ea48529fae /arch/arm/mach-ixp4xx
parent58e570d1182a9dc3bc52d8dc508c6bd5b2d279c7 (diff)
downloadlinux-cba362221b12b102dff1f21b291fdc7b93e24a18.tar.xz
IXP4xx: Fix compilation failure with CONFIG_IXP4XX_INDIRECT_PCI.
Instead of including the heavy linux/mm.h for VMALLOC_START, test the addresses against PCI MIN and MAX addresses. Indirect PCI uses 1:1 mapping for MMIO space making this change possible. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/io.h23
1 files changed, 15 insertions, 8 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index c06d4a2911a6..0e601fe50162 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -55,10 +55,16 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
* access registers. If something outside of PCI is ioremap'd, we
* fallback to the default.
*/
+
+static inline int is_pci_memory(u32 addr)
+{
+ return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
+}
+
static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
unsigned int mtype)
{
- if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff))
+ if (!is_pci_memory(addr))
return __arm_ioremap(addr, size, mtype);
return (void __iomem *)addr;
@@ -66,7 +72,7 @@ static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
static inline void __indirect_iounmap(void __iomem *addr)
{
- if ((__force u32)addr >= VMALLOC_START)
+ if (!is_pci_memory((__force u32)addr))
__iounmap(addr);
}
@@ -94,7 +100,7 @@ static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
u32 addr = (u32)p;
u32 n, byte_enables, data;
- if (addr >= VMALLOC_START) {
+ if (!is_pci_memory(addr)) {
__raw_writeb(value, addr);
return;
}
@@ -117,7 +123,7 @@ static inline void __indirect_writew(u16 value, volatile void __iomem *p)
u32 addr = (u32)p;
u32 n, byte_enables, data;
- if (addr >= VMALLOC_START) {
+ if (!is_pci_memory(addr)) {
__raw_writew(value, addr);
return;
}
@@ -138,7 +144,8 @@ static inline void __indirect_writesw(volatile void __iomem *bus_addr,
static inline void __indirect_writel(u32 value, volatile void __iomem *p)
{
u32 addr = (__force u32)p;
- if (addr >= VMALLOC_START) {
+
+ if (!is_pci_memory(addr)) {
__raw_writel(value, p);
return;
}
@@ -158,7 +165,7 @@ static inline unsigned char __indirect_readb(const volatile void __iomem *p)
u32 addr = (u32)p;
u32 n, byte_enables, data;
- if (addr >= VMALLOC_START)
+ if (!is_pci_memory(addr))
return __raw_readb(addr);
n = addr % 4;
@@ -181,7 +188,7 @@ static inline unsigned short __indirect_readw(const volatile void __iomem *p)
u32 addr = (u32)p;
u32 n, byte_enables, data;
- if (addr >= VMALLOC_START)
+ if (!is_pci_memory(addr))
return __raw_readw(addr);
n = addr % 4;
@@ -204,7 +211,7 @@ static inline unsigned long __indirect_readl(const volatile void __iomem *p)
u32 addr = (__force u32)p;
u32 data;
- if (addr >= VMALLOC_START)
+ if (!is_pci_memory(addr))
return __raw_readl(p);
if (ixp4xx_pci_read(addr, NP_CMD_MEMREAD, &data))