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authorPeng Fan <peng.fan@nxp.com>2022-10-20 13:17:01 +0300
committerShawn Guo <shawnguo@kernel.org>2022-10-29 10:43:32 +0300
commit80e566893e81a6005c8463458a349c7ff65bce97 (patch)
tree2f7a7b1e69816d162f66130aa9a118514607f069 /arch/arm64/boot/dts/freescale/imx93.dtsi
parent435bfa00f4d523a67abb445833386e0a177b4a28 (diff)
downloadlinux-80e566893e81a6005c8463458a349c7ff65bce97.tar.xz
arm64: dts: imx93: add extra lpspi node
Add more lpspi nodes which exist in i.MX93 Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx93.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx93.dtsi72
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index d8e2301a4831..4b4a500ed86c 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -301,6 +301,30 @@
status = "disabled";
};
+ lpspi3: spi@42550000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+ reg = <0x42550000 0x10000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
+ <&clk IMX93_CLK_BUS_WAKEUP>;
+ clock-names = "per", "ipg";
+ status = "disabled";
+ };
+
+ lpspi4: spi@42560000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+ reg = <0x42560000 0x10000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
+ <&clk IMX93_CLK_BUS_WAKEUP>;
+ clock-names = "per", "ipg";
+ status = "disabled";
+ };
+
lpuart3: serial@42570000 {
compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x42570000 0x1000>;
@@ -395,6 +419,54 @@
status = "disabled";
};
+ lpspi5: spi@426f0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+ reg = <0x426f0000 0x10000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
+ <&clk IMX93_CLK_BUS_WAKEUP>;
+ clock-names = "per", "ipg";
+ status = "disabled";
+ };
+
+ lpspi6: spi@42700000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+ reg = <0x42700000 0x10000>;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
+ <&clk IMX93_CLK_BUS_WAKEUP>;
+ clock-names = "per", "ipg";
+ status = "disabled";
+ };
+
+ lpspi7: spi@42710000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+ reg = <0x42710000 0x10000>;
+ interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
+ <&clk IMX93_CLK_BUS_WAKEUP>;
+ clock-names = "per", "ipg";
+ status = "disabled";
+ };
+
+ lpspi8: spi@42720000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+ reg = <0x42720000 0x10000>;
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
+ <&clk IMX93_CLK_BUS_WAKEUP>;
+ clock-names = "per", "ipg";
+ status = "disabled";
+ };
+
};
aips3: bus@42800000 {