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author | Alexandre Mergnat <amergnat@baylibre.com> | 2023-03-29 11:54:33 +0300 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-03-30 20:31:18 +0300 |
commit | 91e217d4b6ea3903f6052fa1fd5179037171b2a5 (patch) | |
tree | c1e38865513810856781eb3536457f6d3984a94b /arch/arm64/boot/dts/mediatek/mt8365.dtsi | |
parent | 8b5db516c9416d72d49c95656662fa1fbea446e1 (diff) | |
download | linux-91e217d4b6ea3903f6052fa1fd5179037171b2a5.tar.xz |
arm64: dts: mediatek: add ethernet support for mt8365 SoC
This IP is a 10/100 MAC controller compliant with IEEE 802.3 standards.
It supports power management with Energy Efficient Ethernet and Wake-on-LAN
specification. Flow control is provided for half-duplex and full-duplex
mode. For packet transmission and reception, the controller supports
IPv4/UDP/TCP checksum offload and VLAN tag insertion.
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230203-evk-board-support-v3-12-0003e80e0095@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt8365.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 2a56997239b2..1f6b48359115 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -427,6 +427,18 @@ status = "disabled"; }; + ethernet: ethernet@112a0000 { + compatible = "mediatek,mt8365-eth"; + reg = <0 0x112a0000 0 0x1000>; + mediatek,pericfg = <&infracfg>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&topckgen CLK_TOP_ETH_SEL>, + <&infracfg CLK_IFR_NIC_AXI>, + <&infracfg CLK_IFR_NIC_SLV_AXI>; + clock-names = "core", "reg", "trans"; + status = "disabled"; + }; + u3phy: t-phy@11cc0000 { compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; |