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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-09 12:53:50 +0300 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-18 15:53:34 +0300 |
commit | 4cebce2577239fc02fd396327b01db97b2f6e257 (patch) | |
tree | 9bb05173bcc670a5baf9ecb1bf7e286bc531f3df /arch/arm64/boot/dts/renesas/r8a779g0.dtsi | |
parent | 495e36c3a3134b0f3b89f64cd90d3ed722ac0586 (diff) | |
download | linux-4cebce2577239fc02fd396327b01db97b2f6e257.tar.xz |
arm64: dts: renesas: r8a779g0: Add pinctrl device node
Add a device node for the Pin Function Controller on the Renesas R-Car
V4H (R8A779G0) SoC.
Based on a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ecddcadd2fad46b1cf4c9be3ec750f360b9730e4.1662715538.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a779g0.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 63319fee25d9..71fce6c03af0 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -70,6 +70,15 @@ status = "disabled"; }; + pfc: pinctrl@e6050000 { + compatible = "renesas,pfc-r8a779g0"; + reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, + <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, + <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, + <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, + <0 0xe6068000 0 0x16c>; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a779g0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; |