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author | Bhavya Kapoor <b-kapoor@ti.com> | 2023-02-03 10:37:24 +0300 |
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committer | Nishanth Menon <nm@ti.com> | 2023-03-14 23:31:28 +0300 |
commit | 4f4b30a777d3e61603119297965343a37be36435 (patch) | |
tree | 9b8cfe257d47b1a698fa4ebadd5cff06ff29dae9 /arch/arm64/boot/dts/ti | |
parent | a1bc0d6084dba8a31831c65318a8a8e46f00906f (diff) | |
download | linux-4f4b30a777d3e61603119297965343a37be36435.tar.xz |
arm64: dts: ti: k3-j721e-main: Remove ti,strobe-sel property
According to latest errata of J721e [1], (i2024) 'MMCSD: Peripherals
Do Not Support HS400' which applies to MMCSD0 subsystem. Speed modes
supported has been already updated but missed dropping 'ti,strobe-sel'
property which is only required by HS400 speed mode.
Thus, drop 'ti,strobe-sel' property from kernel dtsi for J721e SoC.
[1] https://www.ti.com/lit/er/sprz455/sprz455.pdf
Fixes: eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems")
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Diwakar Dhyani <d-dhyani@ti.com>
Reviewed-by: Nitin Yadav <n-yadav@ti.com>
Link: https://lore.kernel.org/r/20230203073724.29529-1-b-kapoor@ti.com
Diffstat (limited to 'arch/arm64/boot/dts/ti')
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index c935622f0102..bfa296dce3a3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1180,7 +1180,6 @@ ti,itap-del-sel-mmc-hs = <0xa>; ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>; - ti,strobe-sel = <0x77>; dma-coherent; }; |