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| author | Michal Simek <michal.simek@xilinx.com> | 2021-06-14 18:25:09 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-09-13 09:55:52 +0300 |
| commit | 4234645d1ff55e1bba26b5741ff167980e0a27ea (patch) | |
| tree | 5e6e8c2993fe39fe44691de39b2719e8b7ee70cc /arch/arm64/boot/dts/xilinx/zynqmp.dtsi | |
| parent | 6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f (diff) | |
| download | linux-4234645d1ff55e1bba26b5741ff167980e0a27ea.tar.xz | |
arm64: zynqmp: Disable CCI by default
There is no reason to have CCI no enabled by default. Enable it when your
system configuration requires it. In Xilinx configuration flow this is work
for Device Tree Generator which reads information from HW Design
configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f507d45fbaa0bd31f641e758efa40a2532466ced.1623684253.git.michal.simek@xilinx.com
Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 28dccb891a53..302ca0196c34 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -245,6 +245,7 @@ cci: cci@fd6e0000 { compatible = "arm,cci-400"; + status = "disabled"; reg = <0x0 0xfd6e0000 0x0 0x9000>; ranges = <0x0 0x0 0xfd6e0000 0x10000>; #address-cells = <1>; |