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| author | Mark Brown <broonie@kernel.org> | 2023-01-16 19:04:40 +0300 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2023-01-20 15:23:05 +0300 |
| commit | 8ef55603b8eaf9362464b3197eb139baa4bd18b9 (patch) | |
| tree | c4e08e2171ffc1a94b2dc8faa4f0e5f8453a8cf1 /arch/arm64/include/asm/esr.h | |
| parent | 4edc11744e8cfe9f6d38fe3f656e949c6918bdd2 (diff) | |
| download | linux-8ef55603b8eaf9362464b3197eb139baa4bd18b9.tar.xz | |
arm64/esr: Document ISS for ZT0 being disabled
SME2 defines a new ISS code for use when trapping acesses to ZT0, add a
definition for it.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-5-f2fa0aef982f@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/esr.h')
| -rw-r--r-- | arch/arm64/include/asm/esr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 15b34fbfca66..5f3271e9d5df 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -341,6 +341,7 @@ #define ESR_ELx_SME_ISS_ILL 1 #define ESR_ELx_SME_ISS_SM_DISABLED 2 #define ESR_ELx_SME_ISS_ZA_DISABLED 3 +#define ESR_ELx_SME_ISS_ZT_DISABLED 4 #ifndef __ASSEMBLY__ #include <asm/types.h> |