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| author | Will Deacon <will.deacon@arm.com> | 2018-01-29 14:59:57 +0300 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-02-07 01:53:21 +0300 |
| commit | fa0465fc07c2f9f47bd1198ab368d341bd7c7e4e (patch) | |
| tree | 1015b0bb0f69b0b88e21af1c15924c7102871321 /arch/arm64/kernel/hibernate-asm.S | |
| parent | 6dc52b15c4a48052ade2529d639eee401d76e469 (diff) | |
| download | linux-fa0465fc07c2f9f47bd1198ab368d341bd7c7e4e.tar.xz | |
arm64: assembler: Change order of macro arguments in phys_to_ttbr
Since AArch64 assembly instructions take the destination register as
their first operand, do the same thing for the phys_to_ttbr macro.
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/hibernate-asm.S')
| -rw-r--r-- | arch/arm64/kernel/hibernate-asm.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/kernel/hibernate-asm.S b/arch/arm64/kernel/hibernate-asm.S index 84f5d52fddda..dd14ab8c9f72 100644 --- a/arch/arm64/kernel/hibernate-asm.S +++ b/arch/arm64/kernel/hibernate-asm.S @@ -34,12 +34,12 @@ * each stage of the walk. */ .macro break_before_make_ttbr_switch zero_page, page_table, tmp - phys_to_ttbr \zero_page, \tmp + phys_to_ttbr \tmp, \zero_page msr ttbr1_el1, \tmp isb tlbi vmalle1 dsb nsh - phys_to_ttbr \page_table, \tmp + phys_to_ttbr \tmp, \page_table msr ttbr1_el1, \tmp isb .endm |