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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-03-02 21:34:14 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-03-02 21:34:14 +0300 |
| commit | 04a357b1f6f0b6f7c8689361fa8802e8e35d02ad (patch) | |
| tree | 00acf8b0227d582929c812a114a5edcc650eac10 /arch/mips/include | |
| parent | 857f1268a591147f7be7509f249dbb3aba6fc65c (diff) | |
| parent | 1a2c73f4834dd79e4f2c590ac75358fb44137650 (diff) | |
| download | linux-04a357b1f6f0b6f7c8689361fa8802e8e35d02ad.tar.xz | |
Merge tag 'mips_6.3_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull more MIPS updates from Thomas Bogendoerfer:
"A few more cleanups and fixes"
* tag 'mips_6.3_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Workaround clang inline compat branch issue
mips: dts: ralink: mt7621: add phandle to system controller node for watchdog
mips: dts: ralink: mt7621: rename watchdog node from 'wdt' into 'watchdog'
mips: ralink: make SOC_MT7621 select PINCTRL
mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK
MIPS: cevt-r4k: Offset the value used to clear compare interrupt
MIPS: smp-cps: Don't rely on CP0_CMGCRBASE
MIPS: Remove DMA_PERDEV_COHERENT
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/asm.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/smp-cps.h | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 336ac9b65235..2e99450f4228 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -336,7 +336,7 @@ symbol = value */ #ifdef CONFIG_WAR_R10000_LLSC # define SC_BEQZ beqzl -#elif MIPS_ISA_REV >= 6 +#elif !defined(CONFIG_CC_HAS_BROKEN_INLINE_COMPAT_BRANCH) && MIPS_ISA_REV >= 6 # define SC_BEQZ beqzc #else # define SC_BEQZ beqz diff --git a/arch/mips/include/asm/smp-cps.h b/arch/mips/include/asm/smp-cps.h index 7e5b9411faee..22a572b70fe3 100644 --- a/arch/mips/include/asm/smp-cps.h +++ b/arch/mips/include/asm/smp-cps.h @@ -7,6 +7,8 @@ #ifndef __MIPS_ASM_SMP_CPS_H__ #define __MIPS_ASM_SMP_CPS_H__ +#define CPS_ENTRY_PATCH_INSNS 6 + #ifndef __ASSEMBLY__ struct vpe_boot_config { @@ -30,6 +32,8 @@ extern void mips_cps_boot_vpes(struct core_boot_config *cfg, unsigned vpe); extern void mips_cps_pm_save(void); extern void mips_cps_pm_restore(void); +extern void *mips_cps_core_entry_patch_end; + #ifdef CONFIG_MIPS_CPS extern bool mips_cps_smp_in_use(void); |