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| author | Kan Liang <kan.liang@linux.intel.com> | 2020-07-03 15:49:16 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2020-07-08 12:38:53 +0300 |
| commit | 5624986dc61b81a77fb6136bc232593483d1c254 (patch) | |
| tree | 99a220f73d6d76b503a21a9ee3d8799eb6870e3d /arch/x86/include/asm/perf_event.h | |
| parent | 49d8184f2036ff5b8d1eea3d61bac8b23420eca7 (diff) | |
| download | linux-5624986dc61b81a77fb6136bc232593483d1c254.tar.xz | |
perf/x86/intel/lbr: Unify the stored format of LBR information
Current LBR information in the structure x86_perf_task_context is stored
in a different format from the PEBS LBR record and Architecture LBR,
which prevents the sharing of the common codes.
Use the format of the PEBS LBR record as a unified format. Use a generic
name lbr_entry to replace pebs_lbr_entry.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1593780569-62993-11-git-send-email-kan.liang@linux.intel.com
Diffstat (limited to 'arch/x86/include/asm/perf_event.h')
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 9ffce7d31c4c..2e29558c9c6b 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -282,14 +282,10 @@ struct pebs_xmm { u64 xmm[16*2]; /* two entries for each register */ }; -struct pebs_lbr_entry { +struct lbr_entry { u64 from, to, info; }; -struct pebs_lbr { - struct pebs_lbr_entry lbr[0]; /* Variable length */ -}; - /* * IBS cpuid feature detection */ |