diff options
| author | Kan Liang <kan.liang@linux.intel.com> | 2020-07-23 20:11:07 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2020-08-18 17:34:35 +0300 |
| commit | d39fcc32893dac2d02900d99c38276a00cc54d60 (patch) | |
| tree | c52a0931df8d80c861f5ec671da62f8c86e347ca /arch/x86/include/asm/perf_event.h | |
| parent | 6f7225099d5f3ec3019f380a0da2b456b7796cb0 (diff) | |
| download | linux-d39fcc32893dac2d02900d99c38276a00cc54d60.tar.xz | |
perf/x86/intel: Move BTS index to 47
The bit 48 in the PERF_GLOBAL_STATUS is used to indicate the overflow
status of the PERF_METRICS counters.
Move the BTS index to the bit 47.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200723171117.9918-5-kan.liang@linux.intel.com
Diffstat (limited to 'arch/x86/include/asm/perf_event.h')
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index fe8110a8c75b..58419e50ff98 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -238,11 +238,11 @@ struct x86_pmu_capability { /* * We model BTS tracing as another fixed-mode PMC. * - * We choose a value in the middle of the fixed event range, since lower + * We choose the value 47 for the fixed index of BTS, since lower * values are used by actual fixed events and higher values are used * to indicate other overflow conditions in the PERF_GLOBAL_STATUS msr. */ -#define INTEL_PMC_IDX_FIXED_BTS (INTEL_PMC_IDX_FIXED + 16) +#define INTEL_PMC_IDX_FIXED_BTS (INTEL_PMC_IDX_FIXED + 15) #define GLOBAL_STATUS_COND_CHG BIT_ULL(63) #define GLOBAL_STATUS_BUFFER_OVF_BIT 62 |