diff options
| author | Jakub Kicinski <kuba@kernel.org> | 2024-03-22 02:14:13 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-03-22 02:15:08 +0300 |
| commit | 537c2e91d3549e5d6020bb0576cf9b54a845255f (patch) | |
| tree | c09e8a1b7d733cde19b0c72678c28fb2bc97ff6b /drivers/clk/qcom/gcc-sc8280xp.c | |
| parent | 237bb5f7f7f55ec5f773469a974c61a49c298625 (diff) | |
| parent | cba9ffdb9913dfe6be29f049ce920ce451ce7cc4 (diff) | |
| download | linux-537c2e91d3549e5d6020bb0576cf9b54a845255f.tar.xz | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/gcc-sc8280xp.c')
| -rw-r--r-- | drivers/clk/qcom/gcc-sc8280xp.c | 29 |
1 files changed, 12 insertions, 17 deletions
diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c index bfb77931e868..082d7b5504eb 100644 --- a/drivers/clk/qcom/gcc-sc8280xp.c +++ b/drivers/clk/qcom/gcc-sc8280xp.c @@ -7448,8 +7448,8 @@ static const struct qcom_reset_map gcc_sc8280xp_resets[] = { [GCC_USB4PHY_PHY_PRIM_BCR] = { 0x4a004 }, [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, [GCC_VIDEO_BCR] = { 0x28000 }, - [GCC_VIDEO_AXI0_CLK_ARES] = { 0x28010, 2 }, - [GCC_VIDEO_AXI1_CLK_ARES] = { 0x28018, 2 }, + [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x28010, .bit = 2, .udelay = 400 }, + [GCC_VIDEO_AXI1_CLK_ARES] = { .reg = 0x28018, .bit = 2, .udelay = 400 }, }; static struct gdsc *gcc_sc8280xp_gdscs[] = { @@ -7543,21 +7543,16 @@ static int gcc_sc8280xp_probe(struct platform_device *pdev) goto err_put_rpm; } - /* - * Keep the clocks always-ON - * GCC_CAMERA_AHB_CLK, GCC_CAMERA_XO_CLK, GCC_DISP_AHB_CLK, - * GCC_DISP_XO_CLK, GCC_GPU_CFG_AHB_CLK, GCC_VIDEO_AHB_CLK, - * GCC_VIDEO_XO_CLK, GCC_DISP1_AHB_CLK, GCC_DISP1_XO_CLK - */ - regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x26020, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x27004, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x27028, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x28004, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x28028, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0xbb004, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0xbb028, BIT(0), BIT(0)); + /* Keep some clocks always-on */ + qcom_branch_set_clk_en(regmap, 0x26004); /* GCC_CAMERA_AHB_CLK */ + qcom_branch_set_clk_en(regmap, 0x26020); /* GCC_CAMERA_XO_CLK */ + qcom_branch_set_clk_en(regmap, 0x27004); /* GCC_DISP_AHB_CLK */ + qcom_branch_set_clk_en(regmap, 0x27028); /* GCC_DISP_XO_CLK */ + qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */ + qcom_branch_set_clk_en(regmap, 0x28004); /* GCC_VIDEO_AHB_CLK */ + qcom_branch_set_clk_en(regmap, 0x28028); /* GCC_VIDEO_XO_CLK */ + qcom_branch_set_clk_en(regmap, 0xbb004); /* GCC_DISP1_AHB_CLK */ + qcom_branch_set_clk_en(regmap, 0xbb028); /* GCC_DISP1_XO_CLK */ ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, ARRAY_SIZE(gcc_dfs_clocks)); if (ret) |