diff options
| author | Elaine Zhang <zhangqing@rock-chips.com> | 2016-12-29 05:45:10 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2017-01-02 16:24:57 +0300 |
| commit | 7bed92460d910c75f0d722f1240d2dc1d466d884 (patch) | |
| tree | bd93e4e945478ec6a7806d1856788dd5b2ae8d33 /drivers/clk/rockchip/clk.h | |
| parent | 4d3e84f9962800fb355e1c10e57e998ae574efa2 (diff) | |
| download | linux-7bed92460d910c75f0d722f1240d2dc1d466d884.tar.xz | |
clk: rockchip: add new pll-type for rk3328
The rk3328's pll and clock are similar with rk3036's,
it different with pll_mode_mask, the rk3328 soc
pll mode only one bit(rk3036 soc have two bits)
so these should be independent and separate from
the series of rk3328s.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/clk.h')
| -rw-r--r-- | drivers/clk/rockchip/clk.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 58be202c55d9..8f83cde407c9 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -130,6 +130,7 @@ struct clk; enum rockchip_pll_type { pll_rk3036, pll_rk3066, + pll_rk3328, pll_rk3399, }; |