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authorPeter De Schrijver <pdeschrijver@nvidia.com>2017-02-28 17:37:18 +0300
committerThierry Reding <treding@nvidia.com>2017-03-20 16:06:33 +0300
commit319af7975c9ff500a30b2e6c4433c1f327283884 (patch)
tree3859ab89e50cccf6d4eb82ce2ef763718d5cfeb4 /drivers/clk/tegra/clk-id.h
parentbfa34832df1fffb79c1719d4016e9cacf0f83b22 (diff)
downloadlinux-319af7975c9ff500a30b2e6c4433c1f327283884.tar.xz
clk: tegra: Define Tegra210 DMIC sync clocks
Tegra210 has 3 DMIC inputs which can be clocked from the recovered clock of several other audio inputs (eg. i2s0, i2s1, ...). To model this, we add a 3 new clocks similar to the audio* clocks which handle the same function for the I2S and SPDIF clocks. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-id.h')
-rw-r--r--drivers/clk/tegra/clk-id.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h
index fc978b2bd1ce..b40293c19c19 100644
--- a/drivers/clk/tegra/clk-id.h
+++ b/drivers/clk/tegra/clk-id.h
@@ -309,6 +309,12 @@ enum clk_id {
tegra_clk_sor_safe,
tegra_clk_ispa,
tegra_clk_cec,
+ tegra_clk_dmic1_sync_clk,
+ tegra_clk_dmic2_sync_clk,
+ tegra_clk_dmic3_sync_clk,
+ tegra_clk_dmic1_sync_clk_mux,
+ tegra_clk_dmic2_sync_clk_mux,
+ tegra_clk_dmic3_sync_clk_mux,
tegra_clk_max,
};