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authorJun Nie <jun.nie@linaro.org>2015-07-23 10:02:51 +0300
committerStephen Boyd <sboyd@codeaurora.org>2015-07-28 21:59:34 +0300
commit4599dd2c926915b5e8c27e0ca21a6172f9d6881c (patch)
tree311e7418c570e049d2abbd60bd720c9b7b537aa1 /drivers/clk/zte/clk.h
parent7764d0cdc3dbf15010f66e0e2e5786f0f03d402a (diff)
downloadlinux-4599dd2c926915b5e8c27e0ca21a6172f9d6881c.tar.xz
clk: zx: Add audio div clock method for zx296702
Add SPDIF/I2S divider clock method for zx296702 Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/zte/clk.h')
-rw-r--r--drivers/clk/zte/clk.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clk/zte/clk.h b/drivers/clk/zte/clk.h
index 0914a82d0535..65ae08b818d3 100644
--- a/drivers/clk/zte/clk.h
+++ b/drivers/clk/zte/clk.h
@@ -29,4 +29,13 @@ struct clk_zx_pll {
struct clk *clk_register_zx_pll(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg_base,
const struct zx_pll_config *lookup_table, int count, spinlock_t *lock);
+
+struct clk_zx_audio {
+ struct clk_hw hw;
+ void __iomem *reg_base;
+};
+
+struct clk *clk_register_zx_audio(const char *name,
+ const char * const parent_name,
+ unsigned long flags, void __iomem *reg_base);
#endif