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authorAmelie Delaunay <amelie.delaunay@st.com>2020-11-20 17:33:19 +0300
committerVinod Koul <vkoul@kernel.org>2020-12-11 18:43:08 +0300
commite0ebdbdcb42a66f49b7587dc50cc6f528ec55cad (patch)
tree579c34397afd3f4551462f47fab13e66e0824186 /drivers/dma/stm32-mdma.c
parent5d4d4dfbda18063231a95dea28fdeab148f23301 (diff)
downloadlinux-e0ebdbdcb42a66f49b7587dc50cc6f528ec55cad.tar.xz
dmaengine: stm32-dma: take address into account when computing max width
DMA_SxPAR or DMA_SxM0AR/M1AR registers have to be aligned on PSIZE or MSIZE respectively. This means that bus width needs to be forced to 1 byte when computed width is not aligned with address. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Link: https://lore.kernel.org/r/20201120143320.30367-4-amelie.delaunay@st.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/stm32-mdma.c')
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