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authoryipechai <YiPeng.Chai@amd.com>2022-02-17 10:33:24 +0300
committerAlex Deucher <alexander.deucher@amd.com>2022-03-03 02:40:06 +0300
commit30e58102d5164ce5df10bbff4c9d05acbd12a5fe (patch)
tree5981ad928c61ded7a8cfc59946006f8ea9ef0be1 /drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
parent149d7ba1f8fe515a2a36ff95fa659720e72fe4ed (diff)
downloadlinux-30e58102d5164ce5df10bbff4c9d05acbd12a5fe.tar.xz
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block
Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block. Signed-off-by: yipechai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mca_v3_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mca_v3_0.c21
1 files changed, 3 insertions, 18 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
index 02c50be19d3b..5ce6778a821d 100644
--- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
@@ -37,11 +37,6 @@ static void mca_v3_0_mp0_query_ras_error_count(struct amdgpu_device *adev,
ras_error_status);
}
-static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
-{
- amdgpu_mca_ras_fini(adev, &adev->mca.mp0);
-}
-
static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,
enum amdgpu_ras_block block, uint32_t sub_block_index)
{
@@ -71,7 +66,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = {
},
.hw_ops = &mca_v3_0_mp0_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match,
- .ras_fini = mca_v3_0_mp0_ras_fini,
+ .ras_fini = amdgpu_ras_block_late_fini,
},
};
@@ -83,11 +78,6 @@ static void mca_v3_0_mp1_query_ras_error_count(struct amdgpu_device *adev,
ras_error_status);
}
-static void mca_v3_0_mp1_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
-{
- amdgpu_mca_ras_fini(adev, &adev->mca.mp1);
-}
-
const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = {
.query_ras_error_count = mca_v3_0_mp1_query_ras_error_count,
.query_ras_error_address = NULL,
@@ -103,7 +93,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = {
},
.hw_ops = &mca_v3_0_mp1_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match,
- .ras_fini = mca_v3_0_mp1_ras_fini,
+ .ras_fini = amdgpu_ras_block_late_fini,
},
};
@@ -115,11 +105,6 @@ static void mca_v3_0_mpio_query_ras_error_count(struct amdgpu_device *adev,
ras_error_status);
}
-static void mca_v3_0_mpio_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
-{
- amdgpu_mca_ras_fini(adev, &adev->mca.mpio);
-}
-
const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = {
.query_ras_error_count = mca_v3_0_mpio_query_ras_error_count,
.query_ras_error_address = NULL,
@@ -135,7 +120,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = {
},
.hw_ops = &mca_v3_0_mpio_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match,
- .ras_fini = mca_v3_0_mpio_ras_fini,
+ .ras_fini = amdgpu_ras_block_late_fini,
},
};