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authorBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>2020-05-21 19:43:28 +0300
committerAlex Deucher <alexander.deucher@amd.com>2020-07-01 08:59:14 +0300
commit64e7f91e7ac88e94302a213cf61afe70b734fa2a (patch)
tree5f569076b891b62323e6e8c958f32ab74974377e /drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
parent2a3a0d5d7962628684bb5cf4be38747dcbb1f35e (diff)
downloadlinux-64e7f91e7ac88e94302a213cf61afe70b734fa2a.tar.xz
drm/amd/display: Add DCN3 OPTC
Add support for programming the DCN3 OPTC (Output Timing Controller) HW Blocks: +--------+ | OPTC | +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
index f803191e3134..084432132b16 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
@@ -98,9 +98,19 @@ enum crc_selection {
INTERSECT_WINDOW_NOT_A_NOT_B,
};
+#ifdef CONFIG_DRM_AMD_DC_DCN3_0
+enum otg_out_mux_dest {
+ OUT_MUX_DIO = 0,
+};
+#endif
+
enum h_timing_div_mode {
H_TIMING_NO_DIV,
H_TIMING_DIV_BY2,
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+ H_TIMING_RESERVED,
+ H_TIMING_DIV_BY4,
+#endif
};
struct crc_params {
@@ -278,6 +288,15 @@ struct timing_generator_funcs {
void (*set_gsl_source_select)(struct timing_generator *optc,
int group_idx,
uint32_t gsl_ready_signal);
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+ void (*set_out_mux)(struct timing_generator *tg, enum otg_out_mux_dest dest);
+ void (*set_vrr_m_const)(struct timing_generator *optc,
+ double vtotal_avg);
+ void (*set_drr_trigger_window)(struct timing_generator *optc,
+ uint32_t window_start, uint32_t window_end);
+ void (*set_vtotal_change_limit)(struct timing_generator *optc,
+ uint32_t limit);
+#endif
};
#endif