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authorAnthony Koo <Anthony.Koo@amd.com>2019-01-20 09:08:02 +0300
committerAlex Deucher <alexander.deucher@amd.com>2019-02-06 21:30:44 +0300
commit68f1a00c23d443c9d940fbd512a195e9e6c08b11 (patch)
treedafcbc81858c8faa6c77d5c1c61beec8e620d551 /drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
parentc00800c46e832ca27f4db489b8c28a56603f8d2c (diff)
downloadlinux-68f1a00c23d443c9d940fbd512a195e9e6c08b11.tar.xz
drm/amd/display: interface to check if timing can be seamless
[Why] Need to figure out whether a timing we want to commit matches something that GOP already programmed, in which case we can decide to some optimizations [How] 1. Add way to check for DIG FE 2. Add way to check for matching OTG timing 3. Add way to check for matching pixel clock (if possible) - Currently only support DP for pixel clock, since it is easy to calc Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
index 39fec0186c10..5d6cca7826f3 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
@@ -170,6 +170,8 @@ struct timing_generator_funcs {
bool (*get_otg_active_size)(struct timing_generator *optc,
uint32_t *otg_active_width,
uint32_t *otg_active_height);
+ bool (*is_matching_timing)(struct timing_generator *tg,
+ const struct dc_crtc_timing *otg_timing);
void (*set_early_control)(struct timing_generator *tg,
uint32_t early_cntl);
void (*wait_for_state)(struct timing_generator *tg,