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| author | Weinan Li <weinan.z.li@intel.com> | 2018-01-26 10:09:08 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-02-06 22:41:16 +0300 |
| commit | 9212b13f28374815d9def65e3c877a35092e1c6e (patch) | |
| tree | 8836ab2bd9a7be81aeb8fc859ea5d68d6cf2dc9d /drivers/gpu/drm/i915/gvt/cfg_space.c | |
| parent | 7569a06dc80ec05c96783f541fa706ea3bebec79 (diff) | |
| download | linux-9212b13f28374815d9def65e3c877a35092e1c6e.tar.xz | |
drm/i915/gvt: only reset execlist state of one engine during VM engine reset
Only reset vgpu execlist state of the exact engine which gets reset
request from VM. After read context status from HWSP enabled, KMD will use
the saved CSB read pointer but not always read from MMIO. When one engine
reset happen, only the read pointer of this engine will be reset, in GVT-g
host side also need to align with this policy, otherwise VM may get wrong
CSB status after one engine reset compeleted.
v2: Split refine and fix patch, code refine(Zhenyu)
v3: Move active flag of vgpu scheduler into sched_data(Zhenyu)
Cc: Fred Gao <fred.gao@intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/cfg_space.c')
0 files changed, 0 insertions, 0 deletions