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authorZhi Wang <zhi.a.wang@intel.com>2017-09-28 21:47:55 +0300
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-11-16 06:48:22 +0300
commit7d1e5cdf01789729aff2da4005f51f58b491040c (patch)
treec0260893589093236a8e77d222649ea43e1bac23 /drivers/gpu/drm/i915/gvt/mmio.c
parentf52c380a48f527930c86ea6fd7242873c93ba682 (diff)
downloadlinux-7d1e5cdf01789729aff2da4005f51f58b491040c.tar.xz
drm/i915/gvt: Factor intel_vgpu_page_track
As the data structure of "intel_vgpu_guest_page" will become much heavier in future, it's better to factor out the guest memory page track mechnisim as early as possible. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/mmio.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/mmio.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
index 1e1310f50289..4ea0feb5f04d 100644
--- a/drivers/gpu/drm/i915/gvt/mmio.c
+++ b/drivers/gpu/drm/i915/gvt/mmio.c
@@ -117,18 +117,18 @@ static void failsafe_emulate_mmio_rw(struct intel_vgpu *vgpu, uint64_t pa,
else
memcpy(pt, p_data, bytes);
- } else if (atomic_read(&vgpu->gtt.n_write_protected_guest_page)) {
- struct intel_vgpu_guest_page *gp;
+ } else if (atomic_read(&vgpu->gtt.n_tracked_guest_page)) {
+ struct intel_vgpu_page_track *t;
/* Since we enter the failsafe mode early during guest boot,
* guest may not have chance to set up its ppgtt table, so
* there should not be any wp pages for guest. Keep the wp
* related code here in case we need to handle it in furture.
*/
- gp = intel_vgpu_find_guest_page(vgpu, pa >> PAGE_SHIFT);
- if (gp) {
+ t = intel_vgpu_find_tracked_page(vgpu, pa >> PAGE_SHIFT);
+ if (t) {
/* remove write protection to prevent furture traps */
- intel_vgpu_clean_guest_page(vgpu, gp);
+ intel_vgpu_clean_page_track(vgpu, t);
if (read)
intel_gvt_hypervisor_read_gpa(vgpu, pa,
p_data, bytes);
@@ -170,17 +170,17 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa,
return ret;
}
- if (atomic_read(&vgpu->gtt.n_write_protected_guest_page)) {
- struct intel_vgpu_guest_page *gp;
+ if (atomic_read(&vgpu->gtt.n_tracked_guest_page)) {
+ struct intel_vgpu_page_track *t;
- gp = intel_vgpu_find_guest_page(vgpu, pa >> PAGE_SHIFT);
- if (gp) {
+ t = intel_vgpu_find_tracked_page(vgpu, pa >> PAGE_SHIFT);
+ if (t) {
ret = intel_gvt_hypervisor_read_gpa(vgpu, pa,
p_data, bytes);
if (ret) {
gvt_vgpu_err("guest page read error %d, "
"gfn 0x%lx, pa 0x%llx, var 0x%x, len %d\n",
- ret, gp->gfn, pa, *(u32 *)p_data,
+ ret, t->gfn, pa, *(u32 *)p_data,
bytes);
}
mutex_unlock(&gvt->lock);
@@ -267,17 +267,17 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa,
return ret;
}
- if (atomic_read(&vgpu->gtt.n_write_protected_guest_page)) {
- struct intel_vgpu_guest_page *gp;
+ if (atomic_read(&vgpu->gtt.n_tracked_guest_page)) {
+ struct intel_vgpu_page_track *t;
- gp = intel_vgpu_find_guest_page(vgpu, pa >> PAGE_SHIFT);
- if (gp) {
- ret = gp->handler(gp, pa, p_data, bytes);
+ t = intel_vgpu_find_tracked_page(vgpu, pa >> PAGE_SHIFT);
+ if (t) {
+ ret = t->handler(t, pa, p_data, bytes);
if (ret) {
gvt_err("guest page write error %d, "
"gfn 0x%lx, pa 0x%llx, "
"var 0x%x, len %d\n",
- ret, gp->gfn, pa,
+ ret, t->gfn, pa,
*(u32 *)p_data, bytes);
}
mutex_unlock(&gvt->lock);