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authorXiong Zhang <xiong.y.zhang@intel.com>2017-05-23 00:38:08 +0300
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-06-08 08:59:16 +0300
commit7fb6a7d65292a524256ed6e2d0e94071b0c53936 (patch)
tree5e333228e65e46616aec320dba8f0364ba80ea3a /drivers/gpu/drm/i915/gvt/mpt.h
parent7b8d57587025dc294094b73f08b389a498fb107f (diff)
downloadlinux-7fb6a7d65292a524256ed6e2d0e94071b0c53936.tar.xz
drm/i915/gvt: Change flood gvt dmesg into trace
Currently gvt dmesg is so heavy at drm.debug=0x2 that guest and host almost couldn't run on xengt. This patch transfer these repeated messages into trace, so dmesg is light at drm.debug=0x2, and user could get the target message through trace event and trace filter. Suggested-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/mpt.h')
-rw-r--r--drivers/gpu/drm/i915/gvt/mpt.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gvt/mpt.h b/drivers/gpu/drm/i915/gvt/mpt.h
index 419353624c5a..f0e5487e6688 100644
--- a/drivers/gpu/drm/i915/gvt/mpt.h
+++ b/drivers/gpu/drm/i915/gvt/mpt.h
@@ -133,8 +133,7 @@ static inline int intel_gvt_hypervisor_inject_msi(struct intel_vgpu *vgpu)
if (WARN(control & GENMASK(15, 1), "only support one MSI format\n"))
return -EINVAL;
- gvt_dbg_irq("vgpu%d: inject msi address %x data%x\n", vgpu->id, addr,
- data);
+ trace_inject_msi(vgpu->id, addr, data);
ret = intel_gvt_host.mpt->inject_msi(vgpu->handle, addr, data);
if (ret)