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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-15 19:42:32 +0300 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-15 19:42:32 +0300 |
| commit | ecb41832bd2a7a3f8ac93527cec5e51e3827daed (patch) | |
| tree | a382a3719eca9ac8a22ae7f1715d0bd4843dc8e2 /drivers/gpu/drm/msm/adreno/a6xx_gmu.h | |
| parent | d38b6cf50a6b911ee46683330f3af17fcceca509 (diff) | |
| parent | 0ecfebd2b52404ae0c54a878c872bb93363ada36 (diff) | |
| download | linux-ecb41832bd2a7a3f8ac93527cec5e51e3827daed.tar.xz | |
Merge tag 'v5.2' into next
Sync up with mainline to resolve conflicts in iforce driver.
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a6xx_gmu.h')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h index c721d9165d8e..bedd8e6a63aa 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h @@ -27,9 +27,6 @@ struct a6xx_gmu_bo { /* the GMU is coming up for the first time or back from a power collapse */ #define GMU_COLD_BOOT 1 -/* The GMU is being soft reset after a fault */ -#define GMU_RESET 2 - /* * These define the level of control that the GMU has - the higher the number * the more things that the GMU hardware controls on its own. @@ -52,11 +49,11 @@ struct a6xx_gmu { int hfi_irq; int gmu_irq; - struct regulator *gx; - struct iommu_domain *domain; u64 uncached_iova_base; + struct device *gxpd; + int idle_level; struct a6xx_gmu_bo *hfi; @@ -78,7 +75,7 @@ struct a6xx_gmu { struct a6xx_hfi_queue queues[2]; - struct tasklet_struct hfi_tasklet; + bool hung; }; static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset) |