diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2023-09-18 23:21:48 +0300 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2023-10-31 08:08:19 +0300 |
| commit | ca9686340aba42e8316202c428ef76a304bed75a (patch) | |
| tree | 0e4e89322c7f5ec126204d98b149935cd29ddc90 /drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | |
| parent | 08ab88f5a033c67625272eda99de4d245809e0f6 (diff) | |
| download | linux-ca9686340aba42e8316202c428ef76a304bed75a.tar.xz | |
drm/nouveau/nvjpg/r535: initial support
Adds support for allocating NVJPG classes from RM.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-44-skeggsb@gmail.com
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device/base.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index af072ebcc8fa..77bb0956d9d6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -2593,6 +2593,7 @@ nv170_chipset = { .ce = { 0x000003ff, ga100_ce_new }, .fifo = { 0x00000001, ga100_fifo_new }, .nvdec = { 0x0000001f, ga100_nvdec_new }, + .nvjpg = { 0x00000001, ga100_nvjpg_new }, }; static const struct nvkm_device_chip @@ -2771,6 +2772,7 @@ nv192_chipset = { .gr = { 0x00000001, ad102_gr_new }, .nvdec = { 0x0000000f, ad102_nvdec_new }, .nvenc = { 0x00000007, ad102_nvenc_new }, + .nvjpg = { 0x0000000f, ad102_nvjpg_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2795,6 +2797,7 @@ nv193_chipset = { .gr = { 0x00000001, ad102_gr_new }, .nvdec = { 0x0000000f, ad102_nvdec_new }, .nvenc = { 0x00000007, ad102_nvenc_new }, + .nvjpg = { 0x0000000f, ad102_nvjpg_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2819,6 +2822,7 @@ nv194_chipset = { .gr = { 0x00000001, ad102_gr_new }, .nvdec = { 0x0000000f, ad102_nvdec_new }, .nvenc = { 0x00000007, ad102_nvenc_new }, + .nvjpg = { 0x0000000f, ad102_nvjpg_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2843,6 +2847,7 @@ nv196_chipset = { .gr = { 0x00000001, ad102_gr_new }, .nvdec = { 0x0000000f, ad102_nvdec_new }, .nvenc = { 0x00000007, ad102_nvenc_new }, + .nvjpg = { 0x0000000f, ad102_nvjpg_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; @@ -2867,6 +2872,7 @@ nv197_chipset = { .gr = { 0x00000001, ad102_gr_new }, .nvdec = { 0x0000000f, ad102_nvdec_new }, .nvenc = { 0x00000007, ad102_nvenc_new }, + .nvjpg = { 0x0000000f, ad102_nvjpg_new }, .sec2 = { 0x00000001, ga102_sec2_new }, }; |