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author | Linus Walleij <linus.walleij@linaro.org> | 2018-02-06 12:35:39 +0300 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2018-02-07 11:08:46 +0300 |
commit | 08e3211251e36a506ff6b0c31620e362b5800f47 (patch) | |
tree | 49d795cba06fb5e11375b3ebaa02cdd55958b84f /drivers/gpu/drm/pl111/pl111_drm.h | |
parent | eedd6033b4c88d559afd7c8ac8a76fefcd9834a6 (diff) | |
download | linux-08e3211251e36a506ff6b0c31620e362b5800f47.tar.xz |
drm/pl111: Support variants with broken VBLANK
The early Integrator CLCD synthesized in the Integrator CP and
IM-PD1 FPGAs are broken: their vertical and next base interrupts
are not functional. Support these variants by simply disabling
the use of the vblank interrupt on these variants.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-4-linus.walleij@linaro.org
Diffstat (limited to 'drivers/gpu/drm/pl111/pl111_drm.h')
-rw-r--r-- | drivers/gpu/drm/pl111/pl111_drm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index a9b18195d11d..6d0e450e51b1 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -40,6 +40,7 @@ struct drm_minor; * BGR/RGB routing * @broken_clockdivider: the clock divider is broken and we need to * use the supplied clock directly + * @broken_vblank: the vblank IRQ is broken on this variant * @formats: array of supported pixel formats on this variant * @nformats: the length of the array of supported pixel formats */ @@ -48,6 +49,7 @@ struct pl111_variant_data { bool is_pl110; bool external_bgr; bool broken_clockdivider; + bool broken_vblank; const u32 *formats; unsigned int nformats; }; |