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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-04-28 01:32:50 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:32:21 +0300 |
| commit | 143e3bc7832f85676d0e4235d4238f0c9b0682da (patch) | |
| tree | 8deb88410d5aa0a244c90048696c21a80c551136 /drivers/gpu/drm/xe/xe_gt_sysfs_types.h | |
| parent | 5f230a144a33d9a33448063a23d65c53b6d84cea (diff) | |
| download | linux-143e3bc7832f85676d0e4235d4238f0c9b0682da.tar.xz | |
drm/xe: Clarify register types on PAT programming
Clarify a few things related to the PAT programming, particularly on
MTL:
- The register type doesn't change depending on the GT - what
happens is that media GT writes to other set of registers that
are not MCR
- Remove "UNICAST": otherwise it's confusing why it's not using
MCR registers with the unicast function variant
Also, there isn't much reason to keep those parts as macros: promote
them to proper functions and let the compiler inline if it sees fit.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230427223256.1432787-5-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_gt_sysfs_types.h')
0 files changed, 0 insertions, 0 deletions