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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-02-25 03:15:44 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:29:21 +0300 |
| commit | e12ef39272a3690bc779e2d4d812e36c0e7d45f8 (patch) | |
| tree | 349e9dd37cd2dac563f99139c8af9fba33e7f191 /drivers/gpu/drm/xe/xe_guc_pc.c | |
| parent | c584148145f73819a5ed968dc64ae10060fcd2c5 (diff) | |
| download | linux-e12ef39272a3690bc779e2d4d812e36c0e7d45f8.tar.xz | |
drm/xe/guc_pc: Move gt register to the proper place
Move a few defines from xe_guc_pc.c to the right register, now that
there is one: xe_gt_regs.h.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_guc_pc.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_guc_pc.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c index acaba5c375e5..d91dad8638ef 100644 --- a/drivers/gpu/drm/xe/xe_guc_pc.c +++ b/drivers/gpu/drm/xe/xe_guc_pc.c @@ -31,12 +31,6 @@ #define GEN10_FREQ_INFO_REC _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5ef0) #define RPE_MASK REG_GENMASK(15, 8) -/* For GEN6_RPNSWREQ.reg to be merged when the definition moves to Xe */ -#define REQ_RATIO_MASK REG_GENMASK(31, 23) - -/* For GEN6_GT_CORE_STATUS.reg to be merged when the definition moves to Xe */ -#define RCN_MASK REG_GENMASK(2, 0) - #define GEN12_RPSTAT1 _MMIO(0x1381b4) #define GEN12_CAGF_MASK REG_GENMASK(19, 11) |