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| author | Bommu Krishnaiah <krishnaiah.bommu@intel.com> | 2023-12-15 18:45:33 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:46:20 +0300 |
| commit | 9212da07187f86db8bd124b1ce551a18b8a710d6 (patch) | |
| tree | 2b853271f62d60222d76b9477c5a5227894a06d7 /drivers/gpu/drm/xe/xe_guc_submit.c | |
| parent | 7a8bc11782d39e4d35dc7e78405dfe052cbba9cf (diff) | |
| download | linux-9212da07187f86db8bd124b1ce551a18b8a710d6.tar.xz | |
drm/xe/uapi: add exec_queue_id member to drm_xe_wait_user_fence structure
remove the num_engines/instances members from drm_xe_wait_user_fence
structure and add a exec_queue_id member
Right now this is only checking if the engine list is sane and nothing
else. In the end every operation with this IOCTL is a soft check.
So, let's formalize that and only use this IOCTL to wait on the fence.
exec_queue_id member will help to user space to get proper error code
from kernel while in exec_queue reset
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Francois Dugast <francois.dugast@intel.com>
Acked-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Mateusz Naklicki <mateusz.naklicki@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_guc_submit.c')
0 files changed, 0 insertions, 0 deletions