diff options
| author | Heiner Kallweit <hkallweit1@gmail.com> | 2023-02-16 19:12:12 +0300 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2023-02-18 00:11:37 +0300 |
| commit | 24592482d2351071a05d782c9b2be20342e0d1d2 (patch) | |
| tree | 8afd2f70d5cf14bffad4742738daecb96d5b666d /drivers/i2c/busses/i2c-i801.c | |
| parent | 63fd342fd121c3eea5ff209ec5fc0128214bb017 (diff) | |
| download | linux-24592482d2351071a05d782c9b2be20342e0d1d2.tar.xz | |
i2c: i801: Centralize configuring non-block commands in i801_simple_transaction
Currently configuring command register settings is distributed over multiple
functions. At first centralize this for non-block commands in
i801_simple_transaction().
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-i801.c')
| -rw-r--r-- | drivers/i2c/busses/i2c-i801.c | 31 |
1 files changed, 14 insertions, 17 deletions
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index d7182f7c8720..0d49e958773e 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -738,35 +738,47 @@ static void i801_set_hstadd(struct i801_priv *priv, u8 addr, char read_write) /* Single value transaction function */ static int i801_simple_transaction(struct i801_priv *priv, union i2c_smbus_data *data, - char read_write, int command) + u8 addr, u8 hstcmd, char read_write, int command) { int xact, ret; switch (command) { case I2C_SMBUS_QUICK: + i801_set_hstadd(priv, addr, read_write); xact = I801_QUICK; break; case I2C_SMBUS_BYTE: + i801_set_hstadd(priv, addr, read_write); + if (read_write == I2C_SMBUS_WRITE) + outb_p(hstcmd, SMBHSTCMD(priv)); xact = I801_BYTE; break; case I2C_SMBUS_BYTE_DATA: + i801_set_hstadd(priv, addr, read_write); if (read_write == I2C_SMBUS_WRITE) outb_p(data->byte, SMBHSTDAT0(priv)); + outb_p(hstcmd, SMBHSTCMD(priv)); xact = I801_BYTE_DATA; break; case I2C_SMBUS_WORD_DATA: + i801_set_hstadd(priv, addr, read_write); if (read_write == I2C_SMBUS_WRITE) { outb_p(data->word & 0xff, SMBHSTDAT0(priv)); outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); } + outb_p(hstcmd, SMBHSTCMD(priv)); xact = I801_WORD_DATA; break; case I2C_SMBUS_PROC_CALL: + i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE); outb_p(data->word & 0xff, SMBHSTDAT0(priv)); outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); + outb_p(hstcmd, SMBHSTCMD(priv)); + read_write = I2C_SMBUS_READ; xact = I801_PROC_CALL; break; default: + pci_err(priv->pci_dev, "Unsupported transaction %d\n", command); return -EOPNOTSUPP; } @@ -857,25 +869,10 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, switch (size) { case I2C_SMBUS_QUICK: - i801_set_hstadd(priv, addr, read_write); - break; case I2C_SMBUS_BYTE: - i801_set_hstadd(priv, addr, read_write); - if (read_write == I2C_SMBUS_WRITE) - outb_p(command, SMBHSTCMD(priv)); - break; case I2C_SMBUS_BYTE_DATA: - i801_set_hstadd(priv, addr, read_write); - outb_p(command, SMBHSTCMD(priv)); - break; case I2C_SMBUS_WORD_DATA: - i801_set_hstadd(priv, addr, read_write); - outb_p(command, SMBHSTCMD(priv)); - break; case I2C_SMBUS_PROC_CALL: - i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE); - outb_p(command, SMBHSTCMD(priv)); - read_write = I2C_SMBUS_READ; break; case I2C_SMBUS_BLOCK_DATA: i801_set_hstadd(priv, addr, read_write); @@ -922,7 +919,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, if (block) ret = i801_block_transaction(priv, data, read_write, size); else - ret = i801_simple_transaction(priv, data, read_write, size); + ret = i801_simple_transaction(priv, data, addr, command, read_write, size); /* Some BIOSes don't like it when PEC is enabled at reboot or resume * time, so we forcibly disable it after every transaction. |