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authorDevesh Sharma <devesh.sharma@broadcom.com>2021-06-03 16:15:32 +0300
committerJason Gunthorpe <jgg@nvidia.com>2021-06-03 22:59:11 +0300
commit35f5ace5dea4816f9a20746935a356132bf235ba (patch)
treeb7c1b25534b2d58037eed94b072ca25989763481 /drivers/infiniband/hw/bnxt_re/qplib_res.h
parent32a25f2ea690dfaace19f7a3a916f5d7e1ddafe8 (diff)
downloadlinux-35f5ace5dea4816f9a20746935a356132bf235ba.tar.xz
RDMA/bnxt_re: Enable global atomic ops if platform supports
Enabling Atomic operations for Gen P5 devices if the underlying platform supports global atomic ops. Link: https://lore.kernel.org/r/20210603131534.982257-2-devesh.sharma@broadcom.com Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/infiniband/hw/bnxt_re/qplib_res.h')
-rw-r--r--drivers/infiniband/hw/bnxt_re/qplib_res.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/bnxt_re/qplib_res.h b/drivers/infiniband/hw/bnxt_re/qplib_res.h
index 7a1ab38b95da..d2aea52bd1d8 100644
--- a/drivers/infiniband/hw/bnxt_re/qplib_res.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_res.h
@@ -373,6 +373,7 @@ void bnxt_qplib_free_ctx(struct bnxt_qplib_res *res,
int bnxt_qplib_alloc_ctx(struct bnxt_qplib_res *res,
struct bnxt_qplib_ctx *ctx,
bool virt_fn, bool is_p5);
+int bnxt_qplib_determine_atomics(struct pci_dev *dev);
static inline void bnxt_qplib_hwq_incr_prod(struct bnxt_qplib_hwq *hwq, u32 cnt)
{