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authorRobin Murphy <robin.murphy@arm.com>2022-12-15 19:51:55 +0300
committerJoerg Roedel <jroedel@suse.de>2023-01-13 15:46:20 +0300
commitac9c5e92dd15b9927e7355ccf79df76a58b44344 (patch)
tree99db9b13caf5ab535d3128e9d8cfca2cee0c3ed9 /drivers/iommu/iommu-traces.c
parentb7bfaa761d760e72a969d116517eaa12e404c262 (diff)
downloadlinux-ac9c5e92dd15b9927e7355ccf79df76a58b44344.tar.xz
iommu/arm-smmu: Report IOMMU_CAP_CACHE_COHERENCY even betterer
Although it's vanishingly unlikely that anyone would integrate an SMMU within a coherent interconnect without also making the pagetable walk interface coherent, the same effect happens if a coherent SMMU fails to advertise CTTW correctly. This turns out to be the case on some popular NXP SoCs, where VFIO started failing the IOMMU_CAP_CACHE_COHERENCY test, even though IOMMU_CACHE *was* previously achieving the desired effect anyway thanks to the underlying integration. While those SoCs stand to gain some more general benefits from a firmware update to override CTTW correctly in DT/ACPI, it's also easy to work around this in Linux as well, to avoid imposing too much on affected users - since the upstream client devices *are* correctly marked as coherent, we can trivially infer their coherent paths through the SMMU as well. Reported-by: Vladimir Oltean <vladimir.oltean@nxp.com> Fixes: df198b37e72c ("iommu/arm-smmu: Report IOMMU_CAP_CACHE_COHERENCY better") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/d6dc41952961e5c7b21acac08a8bf1eb0f69e124.1671123115.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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