diff options
| author | Thippeswamy Havalige <thippeswamy.havalige@amd.com> | 2023-10-03 20:34:53 +0300 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2023-10-26 18:02:02 +0300 |
| commit | 8d786149d78c7784144c7179e25134b6530b714b (patch) | |
| tree | 6029c56291d0a559673c3a51222fa3308ab7d4ee /drivers/pci/controller/Kconfig | |
| parent | 4ae1cd7d4be2d1388bcfcd8371eb001a4cec88e2 (diff) | |
| download | linux-8d786149d78c7784144c7179e25134b6530b714b.tar.xz | |
PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
Add support for Xilinx XDMA Soft IP core as Root Port.
The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in
programmable logic.
The integrated XDMA Soft IP block has integrated bridge function that
can act as PCIe Root Port.
[kwilczynski: correct indentation and whitespaces, Kconfig help update]
Link: https://lore.kernel.org/linux-pci/20231003173453.938190-4-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Diffstat (limited to 'drivers/pci/controller/Kconfig')
| -rw-r--r-- | drivers/pci/controller/Kconfig | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index c0c3f2824990..e534c02ee34f 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -324,6 +324,17 @@ config PCIE_XILINX Say 'Y' here if you want kernel to support the Xilinx AXI PCIe Host Bridge driver. +config PCIE_XILINX_DMA_PL + bool "Xilinx DMA PL PCIe host bridge support" + depends on ARCH_ZYNQMP || COMPILE_TEST + depends on PCI_MSI + select PCI_HOST_COMMON + help + Say 'Y' here if you want kernel support for the Xilinx PL DMA + PCIe host bridge. The controller is a Soft IP which can act as + Root Port. If your system provides Xilinx PCIe host controller + bridge DMA as Soft IP say 'Y'; if you are not sure, say 'N'. + config PCIE_XILINX_NWL bool "Xilinx NWL PCIe controller" depends on ARCH_ZYNQMP || COMPILE_TEST |