diff options
author | Mike Rapoport <mike.rapoport@gmail.com> | 2016-02-10 19:33:58 +0300 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-02-12 06:52:37 +0300 |
commit | cdd5df644a69070bd68b326d589226d7c900958c (patch) | |
tree | a202184780add4887e2de1d4d7a57d4d04bb17e0 /drivers/staging/sm750fb/ddk750_chip.c | |
parent | 5557eb17b3f14b92f2512d43ff6d68c6f0a609ef (diff) | |
download | linux-cdd5df644a69070bd68b326d589226d7c900958c.tar.xz |
staging: sm750fb: change defintion of PANEL_PLL_CTRL multi-bit fields
Use more straight-forward definitions for multi-bit field of
PANEL_PLL_CTRL register and use open-coded implementation for register
manipulations.
Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/sm750fb/ddk750_chip.c')
-rw-r--r-- | drivers/staging/sm750fb/ddk750_chip.c | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 467b858c8d4a..d813cc6f1c6b 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -36,10 +36,10 @@ static unsigned int get_mxclk_freq(void) return MHz(130); pll_reg = PEEK32(MXCLK_PLL_CTRL); - M = FIELD_GET(pll_reg, PLL_CTRL, M); - N = FIELD_GET(pll_reg, PLL_CTRL, N); - OD = FIELD_GET(pll_reg, PLL_CTRL, OD); - POD = FIELD_GET(pll_reg, PLL_CTRL, POD); + M = (pll_reg & PLL_CTRL_M_MASK) >> PLL_CTRL_M_SHIFT; + N = (pll_reg & PLL_CTRL_N_MASK) >> PLL_CTRL_M_SHIFT; + OD = (pll_reg & PLL_CTRL_OD_MASK) >> PLL_CTRL_OD_SHIFT; + POD = (pll_reg & PLL_CTRL_POD_MASK) >> PLL_CTRL_POD_SHIFT; return DEFAULT_INPUT_CLOCK * M / N / (1 << OD) / (1 << POD); } @@ -355,6 +355,12 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) unsigned int formatPllReg(pll_value_t *pPLL) { +#ifndef VALIDATION_CHIP + unsigned int POD = pPLL->POD; +#endif + unsigned int OD = pPLL->OD; + unsigned int M = pPLL->M; + unsigned int N = pPLL->N; unsigned int reg = 0; /* @@ -363,13 +369,13 @@ unsigned int formatPllReg(pll_value_t *pPLL) * register. On returning a 32 bit number, the value can be * applied to any PLL in the calling function. */ - reg = PLL_CTRL_POWER + reg = PLL_CTRL_POWER | #ifndef VALIDATION_CHIP - | FIELD_VALUE(0, PLL_CTRL, POD, pPLL->POD) + ((POD << PLL_CTRL_POD_SHIFT) & PLL_CTRL_POD_MASK) | #endif - | FIELD_VALUE(0, PLL_CTRL, OD, pPLL->OD) - | FIELD_VALUE(0, PLL_CTRL, N, pPLL->N) - | FIELD_VALUE(0, PLL_CTRL, M, pPLL->M); + ((OD << PLL_CTRL_OD_SHIFT) & PLL_CTRL_OD_MASK) | + ((N << PLL_CTRL_N_SHIFT) & PLL_CTRL_N_MASK) | + ((M << PLL_CTRL_M_SHIFT) & PLL_CTRL_M_MASK); return reg; } |