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| author | Takashi Iwai <tiwai@suse.de> | 2023-06-26 16:38:02 +0300 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2023-06-26 16:38:02 +0300 |
| commit | d6048fdc870240e5020343f8af0c825829c232bd (patch) | |
| tree | d83ca76eaac5f8bf1c4c16f003aad64baa8fae62 /include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | |
| parent | a15b51375684c2bfa6017bb185139477e7a3b96c (diff) | |
| parent | 2d0cad0473bd1ffbc5842be0b9f2546265acb011 (diff) | |
| download | linux-d6048fdc870240e5020343f8af0c825829c232bd.tar.xz | |
Merge tag 'asoc-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v6.5
A fairly quiet release from a core and framework point of view, but a
very big one from the point of view of new drivers:
- More refectoring from Morimoto-san, this time mainly around DAI
links and how we control the ordering of trigger() callbacks.
- Convert a lot of drivers to use maple tree based caches.
- Lots of work on the x86 driver stack.
- Compressed audio support for Qualcomm.
- Support for AMD SoundWire, Analog Devices SSM3515, Google Chameleon,
Ingenic X1000, Intel systems with various CODECs, Longsoon platforms,
Maxim MAX98388, Mediatek MT8188, Nuvoton NAU8825C, NXP platforms with
NAU8822, Qualcomm WSA884x, StarFive JH7110, Texas Instruments TAS2781.
Diffstat (limited to 'include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h')
| -rw-r--r-- | include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h index 9f7c5103bc82..39f203256c4f 100644 --- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h +++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h @@ -131,6 +131,14 @@ #define RX_CODEC_DMA_RX_7 126 #define QUINARY_MI2S_RX 127 #define QUINARY_MI2S_TX 128 +#define DISPLAY_PORT_RX_0 DISPLAY_PORT_RX +#define DISPLAY_PORT_RX_1 129 +#define DISPLAY_PORT_RX_2 130 +#define DISPLAY_PORT_RX_3 131 +#define DISPLAY_PORT_RX_4 132 +#define DISPLAY_PORT_RX_5 133 +#define DISPLAY_PORT_RX_6 134 +#define DISPLAY_PORT_RX_7 135 #define LPASS_CLK_ID_PRI_MI2S_IBIT 1 #define LPASS_CLK_ID_PRI_MI2S_EBIT 2 |